Design of low-dropout regulator for ultra low power on-chip applications

Low Drop Out (LDO) voltage regulators are commonly used to supply low-voltage digital circuits such as microprocessor cores. These digital circuits normally are continuously changing from one mode of operation to another. Therefore, the load demand can change rapidly resulting in large voltage transients at the output of the regulator which can adversely affect the digital circuitry. In this Master's Thesis, design topologies and challenges of very low-power fully integrated On-Chip Low-Dropout (LDO) regulators have been analyzed. Instead of conventional LDO which makes use of a large external capacitor to have better dynamic response and stability, a CapacitorLess LDO (CL-LDO) is chosen on considerations of smaller area. The most challenging part of designing this kind of regulator is achieving high current efficiency by reducing the quiescent current while ensuring good stability response as well as good regulation performance. Thus, different circuit techniques must be carefully added in order to balance the lack of the large external capacitor having the minimum impact on system efficiency. This work focuses on designing a fully integrated low-dropout regulator with good dynamic performance, high regulation performance and ultra-low power consumption. The stability is achieved by the use of two pole-splitting techniques, namely Cascode and Nested-Miller compensation. The good dynamic response with low quiescent current are achieved by the use of an adaptive biasing circuit, a gm-boost circuit and adaptive power transistor architecture

Low-power read-out ICs for smart electrochemical sensors

Electrochemical sensors are expanding rapidly over other chemical sensoring technologies because of their potential to generate precise, selective, miniaturized and cost-effective analytical devices. These features satisfy the emerging global demand for disposable testing systems at the point-of-need, where usability, portability, and price counts most, enabling to detect critical analytical evidence by anyone, any-where and at any time, without concerning about recalibration and limited shelf life. In particular a disposable electrochemical device must include a paired smart electronic interface to specifically bias the electrochemical cell, acquire signals, per-form data conversion and communicate measurements through a standard digital interface, all under severe restrictions of size and power consumption. This thesis describes the development of a novel, cost-effective, disposable, high-performance and user-friendly electrochemical sensing platform that combines the smartness of CMOS integrated circuits (ICs) with the flexibility of printed electronics. Two practical µW-range readout integrated circuit (ROIC) realizations in 65-nm and0.18-µmCMOS technologies are presented and specifically optimized for the potentiostatic biasing and amperometric read-out of electrochemical sensors. The proposed frontend architectures yield very elegant and compact CMOS implementations by reusing the dynamic properties of the sensor itself to implement continuous-time mixed electrochemical delta-sigma modulators (¿SM). The topologies include differential potentiostats to extend its range. Furthermore, low limit of detection (LOD) values can be achieved by implementing a novel cancellation mechanism of the flicker noise coming from the feedback DAC of the electrochemical ¿SM. A standard interface based onI2Cis included on-chip not only to control the extensive system configuration but also to limit the number of IC pads towards a low-cost flip-chip assembly on flexible substrates. Experimental results from both electrical and electrochemical tests are presented and compared to other state-of-the-art electrochemical sensor frontends. A cost-effective hybrid electronics interfacing approach is proposed, where the electrochemical sensor is directly printed on a flexible PEN substrate that also hosts the CMOS readout integrated circuit (ROIC) as a bare die without wire bonding. Low-cost inkjet printing technology is employed for the development of a three-electrode sensor and all the required connectivity. Anisotropic conductive adhesives are investigated as an emerging approach for mechanical and electrical contact between the IC die and printed inks in order to obtain a disposable flexible smart electrochemical sensory device.En els últims anys s’ha produït una ràpida expansió dels sensors electroquímics en comparació amb altres tecnologies químiques de sensat gràcies al seu potencial per generar dispositius analítics precisos, selectius, miniaturitzats i econòmics. Aquestes característiques satisfan l’actual creixent demanda de sistemes de sensat d’un sol ús, on la usabilitat, la portabilitat i el preu són els factors més importants, permetent detectar evidència analítica per qualsevol persona, en qualsevol lloc i en qualsevol moment, sense limitacions en termes de calibratge o de temps de vida útil. En particular, un dispositiu electroquímic ha d’incloure una interfície electrònica intel·ligent aparellada per estimular específicament la cèl·lula electroquímica, adquirir senyals, realitzar la conversió de dades i comunicar les mesures a través d’una interfície digital estàndard, tot sota restriccions severes de mida, cost i potencia consumida. Aquesta tesi descriu el desenvolupament d’una nova plataforma de detecció electroquímica, econòmica, d’un sol ús, d’alt rendiment i fàcil d’utilitzar, que combina la intel·ligència de circuits integrats CMOS amb la flexibilitat de l’electrònica impresa. Es presenten dues realitzacions de circuits integrats de lectura en tecnologies CMOS de65-nm i 0.18-µmamb un consum de l’ordre de µW, específicament optimitzades per ala polarització potenciostàtica i la lectura amperometria de sensors electroquímics. Les interfícies proposades ofereixen implementacions CMOS molt elegants i compactes, ja que reutilitzen les propietats dinàmiques del mateix sensor per implementar moduladors Delta-Sigma (ΔΣM) mixtes en temps continu. Les topologies inclouen potenciostats diferencials per ampliar el seu rang. A més, permeten aconseguir un límit baix de detecció mitjançant la implementació d’un nou mecanisme de cancel·lació del soroll de baixa freqüència pro-vinent de la retroalimentació digital-analògic del modulador ΔΣM electroquímic. El xip inclou una interfície digital estàndard basada en I2C per controlar l’extensa configuració del sistema i també per reduir el nombre de connexions externes de cara al seu muntatge de baix cost sobre substrats flexibles. Es presenten resultats experimentals de les proves tant elèctriques com electroquímiques i es comparen amb altres interfícies de sensors electroquímics d’última generació. Finalment, es proposa una interfície híbrida rendible, on s’imprimeix directament el sen-sor electroquímic sobre un substrat PEN flexible que també allotja la interfície CMOS integrada de lectura a nivell de dau de silici sense encapsular. Els tres elèctrodes del sensor i tota la connectivitat s’aconsegueixen gràcies a la tecnologia d’impressió d’injecció de tinta de baix cost. Així mateix, s’investiguen els adhesius conductors anisotròpics com un enfocament emergent per al contacte mecànic i elèctric entre la matriu del circuit integrat CMOS i les tintes conductores per tal d’obtenir un dispositiu sensorial electroquímic flexible d’un sol ús.Postprint (published version

Design of low-dropout regulator for ultra low power on-chip applications

Low Drop Out (LDO) voltage regulators are commonly used to supply low-voltage digital circuits such as microprocessor cores. These digital circuits normally are continuously changing from one mode of operation to another. Therefore, the load demand can change rapidly resulting in large voltage transients at the output of the regulator which can adversely affect the digital circuitry. In this Master's Thesis, design topologies and challenges of very low-power fully integrated On-Chip Low-Dropout (LDO) regulators have been analyzed. Instead of conventional LDO which makes use of a large external capacitor to have better dynamic response and stability, a CapacitorLess LDO (CL-LDO) is chosen on considerations of smaller area. The most challenging part of designing this kind of regulator is achieving high current efficiency by reducing the quiescent current while ensuring good stability response as well as good regulation performance. Thus, different circuit techniques must be carefully added in order to balance the lack of the large external capacitor having the minimum impact on system efficiency. This work focuses on designing a fully integrated low-dropout regulator with good dynamic performance, high regulation performance and ultra-low power consumption. The stability is achieved by the use of two pole-splitting techniques, namely Cascode and Nested-Miller compensation. The good dynamic response with low quiescent current are achieved by the use of an adaptive biasing circuit, a gm-boost circuit and adaptive power transistor architecture